quick sort
This commit is contained in:
wangfiox
parent
7caa6a5f08
commit
61a4e5a461
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@ -2,6 +2,15 @@
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# It is not intended for manual editing.
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# It is not intended for manual editing.
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version = 3
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version = 3
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[[package]]
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name = "aho-corasick"
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version = "1.1.3"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "8e60d3430d3a69478ad0993f19238d2df97c507009a52b3c10addcd7f6bcb916"
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dependencies = [
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"memchr",
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]
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[[package]]
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[[package]]
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name = "atty"
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name = "atty"
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version = "0.2.14"
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version = "0.2.14"
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@ -38,6 +47,12 @@ version = "2.5.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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||||||
checksum = "cf4b9d6a944f767f8e5e0db018570623c85f3d925ac718db4e06d0187adb21c1"
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checksum = "cf4b9d6a944f767f8e5e0db018570623c85f3d925ac718db4e06d0187adb21c1"
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[[package]]
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name = "cc"
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version = "1.0.99"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "96c51067fd44124faa7f870b4b1c969379ad32b2ba805aa959430ceaa384f695"
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[[package]]
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[[package]]
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name = "cfg-if"
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name = "cfg-if"
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version = "1.0.0"
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version = "1.0.0"
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@ -159,6 +174,7 @@ version = "0.1.0"
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dependencies = [
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dependencies = [
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"clap",
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"clap",
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"lazy_static",
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"lazy_static",
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"llvm-ir",
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"once_cell",
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"once_cell",
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"rand",
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"rand",
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"rayon",
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"rayon",
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@ -214,6 +230,36 @@ version = "0.4.14"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "78b3ae25bc7c8c38cec158d1f2757ee79e9b3740fbc7ccf0e59e4b08d793fa89"
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checksum = "78b3ae25bc7c8c38cec158d1f2757ee79e9b3740fbc7ccf0e59e4b08d793fa89"
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[[package]]
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name = "llvm-ir"
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version = "0.10.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "434db35c1dc3bce4d16bb60c4f6a57587dfa8224ba92fc080fde38782c35fc90"
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dependencies = [
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"either",
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"llvm-sys",
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"log",
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]
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[[package]]
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name = "llvm-sys"
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version = "160.1.4"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "49f9888529887dfda6c59e20f0e0727b17e826cd54ae1ddf0d4c83850fa23b69"
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dependencies = [
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"cc",
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"lazy_static",
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"libc",
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"regex",
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"semver",
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]
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[[package]]
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name = "log"
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version = "0.4.21"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "90ed8c1e510134f979dbc4f070f87d4313098b704861a105fe34231c70a3901c"
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[[package]]
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[[package]]
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name = "memchr"
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name = "memchr"
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version = "2.7.2"
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version = "2.7.2"
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@ -306,6 +352,35 @@ dependencies = [
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"crossbeam-utils",
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"crossbeam-utils",
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]
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]
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[[package]]
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name = "regex"
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version = "1.10.5"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "b91213439dad192326a0d7c6ee3955910425f441d7038e0d6933b0aec5c4517f"
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dependencies = [
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"aho-corasick",
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"memchr",
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"regex-automata",
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"regex-syntax",
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]
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[[package]]
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name = "regex-automata"
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version = "0.4.7"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "38caf58cc5ef2fed281f89292ef23f6365465ed9a41b7a7754eb4e26496c92df"
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dependencies = [
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"aho-corasick",
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"memchr",
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"regex-syntax",
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]
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[[package]]
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name = "regex-syntax"
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version = "0.8.4"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "7a66a03ae7c801facd77a29370b4faec201768915ac14a721ba36f20bc9c209b"
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[[package]]
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[[package]]
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name = "rustix"
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name = "rustix"
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version = "0.38.34"
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version = "0.38.34"
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@ -325,6 +400,12 @@ version = "1.0.18"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "f3cb5ba0dc43242ce17de99c180e96db90b235b8a9fdc9543c96d2209116bd9f"
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checksum = "f3cb5ba0dc43242ce17de99c180e96db90b235b8a9fdc9543c96d2209116bd9f"
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[[package]]
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name = "semver"
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version = "1.0.23"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "61697e0a1c7e512e84a621326239844a24d8207b4669b41bc18b32ea5cbf988b"
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[[package]]
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[[package]]
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name = "serde"
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name = "serde"
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version = "1.0.203"
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version = "1.0.203"
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@ -5,3 +5,6 @@ edition = "2021"
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[dependencies]
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[dependencies]
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hitc = { path = "/home/wangfiox/Documents/compiler" }
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hitc = { path = "/home/wangfiox/Documents/compiler" }
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#[features]
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#default = ["test"]
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@ -1,3 +1,3 @@
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mod sizeof;
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mod quicksort;
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pub use sizeof::*;
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pub use quicksort::*;
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@ -0,0 +1,179 @@
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//#[cfg(test)]
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pub mod tests {
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use compiler::backend::*;
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#[test]
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pub fn quicksort() {
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let quickSort = Func::new("QuickSort".into(), Vec::new());
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let mut bb0 = Block::new("bb0".into());
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let addispsp_32 = Inst::Add(AddInst::new(REG_SP.into(), REG_SP.into(), (-32).into()));
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let sdra24sp = Inst::Sd(SdInst::new(REG_RA.into(), (24).into(), REG_SP.into()));
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let sds016sp = Inst::Sd(SdInst::new(REG_S0.into(), (16).into(), REG_SP.into()));
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let sds18sp = Inst::Sd(SdInst::new(REG_S1.into(), (8).into(), REG_SP.into()));
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let sds20sp = Inst::Sd(SdInst::new(REG_S2.into(), (0).into(), REG_SP.into()));
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let bgea1a2lbb0_17 = Inst::Branch(
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BranchInst::new(BranchOp::Bge, REG_A1.into(), REG_A2.into(), "LBB0_17".into())
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);
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bb0.push_inst(addispsp_32);
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bb0.push_inst(sdra24sp);
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bb0.push_inst(sds016sp);
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bb0.push_inst(sds18sp);
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bb0.push_inst(sds20sp);
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bb0.push_inst(bgea1a2lbb0_17);
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let mut bb1 = Block::new("bb1".into());
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let mvs2a2 = Inst::Mv(MvInst::new(REG_S2.into(), REG_A2.into()));
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let mvs1a0 = Inst::Mv(MvInst::new(REG_S1.into(), REG_A0.into()));
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let jlbb0_3 = Inst::Jmp(JmpInst::new("LBB0_3".into()));
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bb1.push_inst(mvs2a2);
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bb1.push_inst(mvs1a0);
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bb1.push_inst(jlbb0_3);
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let mut lbb0_2 = Block::new("lbb0_2".into());
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let sllia2s02 = Inst::SLL(SllInst::new(REG_A2.into(), REG_S0.into(), (2).into()));
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let adda2a2s1 = Inst::Add(AddInst::new(REG_A2.into(), REG_A2.into(), REG_S1.into()));
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let swa00a2 = Inst::Sd(SdInst::new(REG_A0.into(), (0).into(), REG_A2.into()));
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let addia2s0_1 = Inst::Add(AddInst::new(REG_A2.into(), REG_S0.into(), (-1).into()));
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let mva0s1 = Inst::Mv(MvInst::new(REG_A0.into(), REG_S1.into()));
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let callquicksort = Inst::Call(CallInst::new("QuickSort".into()));
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let addia1s01 = Inst::Add(AddInst::new(REG_A1.into(), REG_S0.into(), (1).into()));
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let bgea1s2lbb0_17 = Inst::Branch(
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BranchInst::new(BranchOp::Bge, REG_A1.into(), REG_S2.into(), "LBB0_17".into())
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);
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lbb0_2.push_inst(sllia2s02);
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lbb0_2.push_inst(adda2a2s1);
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lbb0_2.push_inst(swa00a2);
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lbb0_2.push_inst(addia2s0_1);
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lbb0_2.push_inst(mva0s1);
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lbb0_2.push_inst(callquicksort);
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lbb0_2.push_inst(addia1s01);
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lbb0_2.push_inst(bgea1s2lbb0_17);
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let mut lbb0_3 = Block::new("LBB0_3".into());
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let sllia0a12 = Inst::SLL(SllInst::new(REG_A0.into(), REG_A1.into(), (2).into()));
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let adda0a0s1 = Inst::Add(AddInst::new(REG_A0.into(), REG_A0.into(), REG_S1.into()));
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// let lwa00a0 = Inst::
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let mvs0a1 = Inst::Mv(MvInst::new(REG_S0.into(), REG_A1.into()));
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let bgea1s2lbb0_2 = Inst::Branch(
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BranchInst::new(BranchOp::Bge, REG_A1.into(), REG_S2.into(), "LBB0_2".into())
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);
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lbb0_3.push_inst(sllia0a12);
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lbb0_3.push_inst(adda0a0s1);
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// lbb0_3.push_inst(lwa00a0)
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lbb0_3.push_inst(mvs0a1);
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lbb0_3.push_inst(bgea1s2lbb0_2);
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let mut bb4 = Block::new("bb4".into());
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let mvs0a1 = Inst::Mv(MvInst::new(REG_S0.into(), REG_A1.into()));
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let mva2s2 = Inst::Mv(MvInst::new(REG_A2.into(), REG_S2.into()));
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let jlbb0_7 = Inst::Jmp(JmpInst::new("LBB0_7".into()));
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bb4.push_inst(mvs0a1);
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bb4.push_inst(mva2s2);
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bb4.push_inst(jlbb0_7);
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let mut lbb0_5 = Block::new("LBB0_5".into());
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let sllis3s22 = Inst::SLL(SllInst::new(REG_S3.into(), REG_S2.into(), (2).into()));
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let adda3a3s1 = Inst::Add(AddInst::new(REG_A3.into(), REG_A3.into(), REG_S1.into()));
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let swa40a3 = Inst::Sd(SdInst::new(REG_A4.into(), (0).into(), REG_A3.into()));
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let addia2a2_1 = Inst::Add(AddInst::new(REG_A2.into(), REG_A2.into(), (-1).into()));
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lbb0_5.push_inst(sllis3s22);
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lbb0_5.push_inst(adda3a3s1);
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lbb0_5.push_inst(swa40a3);
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lbb0_5.push_inst(addia2a2_1);
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let mut llb0_6 = Block::new("LBB0_6".into());
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let bges0a2lbb0_2 = Inst::Branch(
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BranchInst::new(BranchOp::Bge, REG_S0.into(), REG_A2.into(), "LBB0_2".into())
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|
);
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llb0_6.push_inst(bges0a2lbb0_2);
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let mut lbb0_7 = Block::new("LBB0_7".into());
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let bges0a2lbb0_11 = Inst::Branch(
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BranchInst::new(BranchOp::Bge, REG_S0.into(), REG_A2.into(), "LBB0_11".into())
|
||||||
|
);
|
||||||
|
lbb0_7.push_inst(bges0a2lbb0_11);
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|
|
||||||
|
let mut bb8 = Block::new("bb8".into());
|
||||||
|
let sllia3a22 = Inst::SLL(SllInst::new(REG_A3.into(), REG_A2.into(), (2).into()));
|
||||||
|
let adda3a3s1 = Inst::Add(AddInst::new(REG_A3.into(), REG_A3.into(), REG_S1.into()));
|
||||||
|
let mva4a2 = Inst::Mv(MvInst::new(REG_A4.into(), REG_A2.into()));
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bb8.push_inst(sllia3a22);
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bb8.push_inst(adda3a3s1);
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bb8.push_inst(mva4a2);
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||||||
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|
||||||
|
let mut lbb0_9 = Block::new("LBB0_9".into());
|
||||||
|
let lwa50a3 = Inst::Ld(LdInst::new(REG_A5.into(), (0).into(), REG_A3.into()));
|
||||||
|
let blta5a0lbb0_12 = Inst::Branch(
|
||||||
|
BranchInst::new(BranchOp::Blt, REG_A5.into(), REG_A0.into(), "LBB0_12".into())
|
||||||
|
);
|
||||||
|
lbb0_9.push_inst(lwa50a3);
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|
lbb0_9.push_inst(blta5a0lbb0_12);
|
||||||
|
|
||||||
|
let mut bb10 = Block::new("bb10".into());
|
||||||
|
let addia4a4_1 = Inst::Add(AddInst::new(REG_A4.into(), REG_A4.into(), (-1).into()));
|
||||||
|
let addia2a2_1 = Inst::Add(AddInst::new(REG_A2.into(), REG_A2.into(), (-1).into()));
|
||||||
|
let addia3a3_4 = Inst::Add(AddInst::new(REG_A3.into(), REG_A3.into(), (-4).into()));
|
||||||
|
let blts0a4lbb0_9 = Inst::Branch(
|
||||||
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BranchInst::new(BranchOp::Blt, REG_S0.into(), REG_A4.into(), "LBB0_9".into())
|
||||||
|
);
|
||||||
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bb10.push_inst(addia4a4_1);
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bb10.push_inst(addia2a2_1);
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||||||
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bb10.push_inst(addia3a3_4);
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||||||
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|
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let mut lbb0_11 = Block::new("LBB0_11".into());
|
||||||
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let bges0a2lbb0_6 = Inst::Branch(
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||||||
|
BranchInst::new(BranchOp::Bge, REG_S0.into(), REG_A2.into(), "LBB0_6".into())
|
||||||
|
);
|
||||||
|
let jlbb0_13 = Inst::Jmp(JmpInst::new("LBB0_13".into()));
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||||||
|
lbb0_11.push_inst(bges0a2lbb0_6);
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||||||
|
lbb0_11.push_inst(jlbb0_13);
|
||||||
|
|
||||||
|
let mut lbb0_12 = Block::new("LBB0_12".into());
|
||||||
|
let sllia3s02 = Inst::SLL(SllInst::new(REG_A3.into(), REG_S0.into(), (2).into()));
|
||||||
|
let adda3a3s1 = Inst::Add(AddInst::new(REG_A3.into(), REG_A3.into(), REG_S1.into()));
|
||||||
|
let swa50a3 = Inst::Sd(SdInst::new(REG_A5.into(), (0).into(), REG_A3.into()));
|
||||||
|
let addis0s01 = Inst::Add(AddInst::new(REG_S0.into(), REG_S0.into(), (1).into()));
|
||||||
|
let bges0a2lbb0_6 = Inst::Branch(
|
||||||
|
BranchInst::new(BranchOp::Bge, REG_S0.into(), REG_A2.into(), "LBB0_6".into())
|
||||||
|
);
|
||||||
|
lbb0_12.push_inst(sllia3s02);
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||||||
|
lbb0_12.push_inst(adda3a3s1);
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||||||
|
lbb0_12.push_inst(swa50a3);
|
||||||
|
lbb0_12.push_inst(addis0s01);
|
||||||
|
lbb0_12.push_inst(bges0a2lbb0_6);
|
||||||
|
|
||||||
|
let mut lbb0_13 = Block::new("LBB0_13".into());
|
||||||
|
let sllia3s02 = Inst::SLL(SllInst::new(REG_A3.into(), REG_S0.into(), (2).into()));
|
||||||
|
let adda3a3s1 = Inst::Add(AddInst::new(REG_A3.into(), REG_A3.into(), REG_S1.into()));
|
||||||
|
lbb0_13.push_inst(sllia3s02);
|
||||||
|
lbb0_13.push_inst(adda3a3s1);
|
||||||
|
|
||||||
|
let mut lbb0_14 = Block::new("LBB0_14".into());
|
||||||
|
// lw a4, 0(a3)
|
||||||
|
let bgea4a0lbb0_5 = Inst::Branch(
|
||||||
|
BranchInst::new(BranchOp::Bge, REG_A4.into(), REG_A0.into(), "LBB0_5".into())
|
||||||
|
);
|
||||||
|
// lw
|
||||||
|
lbb0_14.push_inst(bgea4a0lbb0_5);
|
||||||
|
|
||||||
|
let mut lbb0_15 = Block::new("LBB0_15".into());
|
||||||
|
let addis0s01 = Inst::Add(AddInst::new(REG_S0.into(), REG_S0.into(), (1).into()));
|
||||||
|
let addia3a34 = Inst::Add(AddInst::new(REG_A3.into(), REG_A3.into(), (4).into()));
|
||||||
|
let bnea2s0lbb0_14 = Inst::Branch(
|
||||||
|
BranchInst::new(BranchOp::Bne, REG_A2.into(), REG_S0.into(), "LBB0_14".into())
|
||||||
|
);
|
||||||
|
lbb0_15.push_inst(addis0s01);
|
||||||
|
lbb0_15.push_inst(addia3a34);
|
||||||
|
lbb0_15.push_inst(bnea2s0lbb0_14);
|
||||||
|
|
||||||
|
let mut bb16 = Block::new("bb16".into());
|
||||||
|
let mvs0a2 = Inst::Mv(MvInst::new(REG_S0.into(), REG_A2.into()));
|
||||||
|
let jlbb0_2 = Inst::Jmp(JmpInst::new("LBB0_2".into()));
|
||||||
|
bb16.push_inst(mvs0a2);
|
||||||
|
bb16.push_inst(jlbb0_2);
|
||||||
|
|
||||||
|
let lbb0_17 = Block::new("LBB0_17".into());
|
||||||
|
// let lia00 = Inst::Li(LiInst::new(REG_A0.into(), (0).into()));
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
@ -1,24 +0,0 @@
|
||||||
#[cfg(test)]
|
|
||||||
pub mod tests {
|
|
||||||
use compiler::backend::*;
|
|
||||||
|
|
||||||
#[test]
|
|
||||||
pub fn quicksort() {
|
|
||||||
let mut bb0 = Block::new("bb0".into());
|
|
||||||
let addispsp_32 = Inst::Add(AddInst::new(REG_SP.into(), REG_SP.into(), (-32).into()));
|
|
||||||
let sdra24sp = Inst::Sd(SdInst::new(REG_RA.into(), (24).into(), REG_SP.into()));
|
|
||||||
let sds016sp = Inst::Sd(SdInst::new(REG_S0.into(), (16).into(), REG_SP.into()));
|
|
||||||
let sds18sp = Inst::Sd(SdInst::new(REG_S1.into(), (8).into(), REG_SP.into()));
|
|
||||||
let sds20sp = Inst::Sd(SdInst::new(REG_S2.into(), (0).into(), REG_SP.into()));
|
|
||||||
let bgea1a2lbb0_17 = Inst::Branch(
|
|
||||||
BranchInst::new(BranchOp::Bge, REG_A1.into(), REG_A2.into(), "LBB0_17".into())
|
|
||||||
);
|
|
||||||
bb0.push_inst(addispsp_32);
|
|
||||||
bb0.push_inst(sdra24sp);
|
|
||||||
bb0.push_inst(sds016sp);
|
|
||||||
bb0.push_inst(sds18sp);
|
|
||||||
bb0.push_inst(sds20sp);
|
|
||||||
bb0.push_inst(bgea1a2lbb0_17);
|
|
||||||
println!("{:?}", bb0.gen_asm());
|
|
||||||
}
|
|
||||||
}
|
|
||||||
22
src/main.rs
22
src/main.rs
|
|
@ -4,24 +4,4 @@ use std::{ fs::File, io::Write };
|
||||||
|
|
||||||
use compiler::backend::*;
|
use compiler::backend::*;
|
||||||
|
|
||||||
fn main() {
|
fn main() {}
|
||||||
let mut bb0 = Block::new("bb0".into());
|
|
||||||
let addispsp_32 = Inst::Add(AddInst::new(REG_SP.into(), REG_SP.into(), (-32).into()));
|
|
||||||
let sdra24sp = Inst::Sd(SdInst::new(REG_RA.into(), (24).into(), REG_SP.into()));
|
|
||||||
let sds016sp = Inst::Sd(SdInst::new(REG_S0.into(), (16).into(), REG_SP.into()));
|
|
||||||
let sds18sp = Inst::Sd(SdInst::new(REG_S1.into(), (8).into(), REG_SP.into()));
|
|
||||||
let sds20sp = Inst::Sd(SdInst::new(REG_S2.into(), (0).into(), REG_SP.into()));
|
|
||||||
let bgea1a2lbb0_17 = Inst::Branch(
|
|
||||||
BranchInst::new(BranchOp::Bge, REG_A1.into(), REG_A2.into(), "LBB0_17".into())
|
|
||||||
);
|
|
||||||
bb0.push_inst(addispsp_32);
|
|
||||||
bb0.push_inst(sdra24sp);
|
|
||||||
bb0.push_inst(sds016sp);
|
|
||||||
bb0.push_inst(sds18sp);
|
|
||||||
bb0.push_inst(sds20sp);
|
|
||||||
bb0.push_inst(bgea1a2lbb0_17);
|
|
||||||
let asm = bb0.gen_asm();
|
|
||||||
|
|
||||||
let mut file = File::create("output.s").expect("Unable to create file");
|
|
||||||
let _ = file.write(asm.as_bytes()).expect("Unable to write data");
|
|
||||||
}
|
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue