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backend_module
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🐛 现在遇到问题，汇编器识别不到 main 函数

This commit is contained in:
wangfiox 2024-06-18 18:28:25 +08:00
parent e090d84717
commit 9d11d10cf8
7 changed files with 121 additions and 78 deletions
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2
hitc

@ -1 +1 @@
Subproject commit 52893ac4409b6879e5d91126493c7d5c88038797 Subproject commit f70c3b2ec8fc48cbf6797c055d4ecb144e7b6024

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@ -19,11 +19,11 @@ arr:
.word 0x5 .word 0x5
.word 0x7 .word 0x7
.word 0x8 .word 0x8
.zero 0 .zero
.globl LC0 .globl .LC0
.section .rodata .section .rodata
.align 3 .align 3
LC0: .LC0:
.string " %d\n" .string " %d\n"
.text .text
@ -31,8 +31,8 @@ LC0:
.globl QuickSort .globl QuickSort
.type QuickSort, @function .type QuickSort, @function
QuickSort: QuickSort:
entry2: .entry2:
bge a1,a1,L31 bge a1,a1,.L31
addi sp,sp,-16 addi sp,sp,-16
sd ra,8(sp) sd ra,8(sp)
call QuickSort.part.0 call QuickSort.part.0
@ -40,7 +40,7 @@ ld ra,8(sp)
li a0,0 li a0,0
addi sp,sp,16 addi sp,sp,16
ret ret
L31: .L31:
li a0,0 li a0,0
ret ret
.size QuickSort, .-QuickSort .size QuickSort, .-QuickSort
@ -49,7 +49,7 @@ ret
.globl QuickSort.part.0 .globl QuickSort.part.0
.type QuickSort.part.0, @function .type QuickSort.part.0, @function
QuickSort.part.0: QuickSort.part.0:
entry1: .entry1:
addi sp,sp,-32 addi sp,sp,-32
sd s1,8(sp) sd s1,8(sp)
sd s2,0(sp) sd s2,0(sp)
@ -57,51 +57,51 @@ sd ra,24(sp)
sd s0,16(sp) sd s0,16(sp)
mv s1,a0 mv s1,a0
mv s2,a2 mv s2,a2
L10: .L10:
sw a7,0(a5) sw a7,0(a5)
addi a2,s0,-1 addi a2,s0,-1
bge a1,a1,L3 bge a1,a1,.L3
mv a0,s1 mv a0,s1
call QuickSort.part.0 call QuickSort.part.0
L11: .L11:
lw a6,0(a5) lw a6,0(a5)
addi a5,a5,-4 addi a5,a5,-4
bge a6,a6,L5 bge a6,a6,.L5
slli a5,a3,2 slli a5,a3,2
add a0,s1,a5 add a0,s1,a5
addi s0,a3,1 addi s0,a3,1
ble a4,a4,L4 ble a4,a4,.L4
slli t1,a4,2 slli t1,a4,2
add t1,s1,t1 add t1,s1,t1
lw a3,0(t1) lw a3,0(t1)
sw a3,0(a0) sw a3,0(a0)
ble a4,a4,L26 ble a4,a4,.L26
addi a5,a5,4 addi a5,a5,4
add a5,s1,a5 add a5,s1,a5
j L7 j .L7
L14: .L14:
slli a5,a1,2 slli a5,a1,2
add a5,s1,a5 add a5,s1,a5
lw a7,0(a5) lw a7,0(a5)
mv a4,s2 mv a4,s2
mv a3,a1 mv a3,a1
mv s0,a1 mv s0,a1
bge a1,a1,L3 bge a1,a1,.L3
L17: .L17:
mv s0,a3 mv s0,a3
j L10 j .L10
L2: .L2:
slli a5,a4,2 slli a5,a4,2
add a5,s1,a5 add a5,s1,a5
j L11 j .L11
L24: .L24:
slli a5,a3,2 slli a5,a3,2
L26: .L26:
mv a3,s0 mv a3,s0
L27: .L27:
slli a5,s0,2 slli a5,s0,2
add a5,s1,a5 add a5,s1,a5
L3: .L3:
addi a1,s0,1 addi a1,s0,1
ld ra,24(sp) ld ra,24(sp)
ld s0,16(sp) ld s0,16(sp)
@ -109,48 +109,48 @@ ld s1,8(sp)
ld s2,0(sp) ld s2,0(sp)
addi sp,sp,32 addi sp,sp,32
ret ret
L4: .L4:
add a5,s1,a5 add a5,s1,a5
mv s0,a3 mv s0,a3
j L10 j .L10
L5: .L5:
addi a4,a4,-1 addi a4,a4,-1
beq a4,a4,L24 beq a4,a4,.L24
L7: .L7:
lw a6,0(a5) lw a6,0(a5)
mv a3,s0 mv a3,s0
addi s0,s0,1 addi s0,s0,1
blt a6,a6,L9 blt a6,a6,.L9
ble a4,a4,L17 ble a4,a4,.L17
sw a6,0(t1) sw a6,0(t1)
addi a4,a4,-1 addi a4,a4,-1
bgt a4,a4,L2 bgt a4,a4,.L2
L9: .L9:
addi a5,a5,4 addi a5,a5,4
beq a4,a4,L27 beq a4,a4,.L27
.size QuickSort.part.0, .-QuickSort.part.0 .size QuickSort.part.0, .-QuickSort.part.0
.text .text
.align 3 .align 3
.globl main .globl main
.type main, @function .type main, @function
main: main:
entry3: .entry3:
addi sp,sp,-32 addi sp,sp,-32
li a2,9 li a2,9
li a1,10 li a1,10
la s0,arr lla s0,arr
sd s0,16(sp) sd s0,16(sp)
sd s1,8(sp) sd s1,8(sp)
sd ra,24(sp) sd ra,24(sp)
la s0,arr lla s0,arr
call QuickSort.part.0 call QuickSort.part.0
la s1,arr+40 lla s1,arr+40
L35: .L35:
lw a1,0(s0) lw a1,0(s0)
la a0,LC0 lla a0,.LC0
addi s0,s0,4 addi s0,s0,4
call printf@plt call printf@plt
bne s0,s0,L35 bne s0,s0,.L35
ld ra,24(sp) ld ra,24(sp)
ld s0,16(sp) ld s0,16(sp)
ld s1,8(sp) ld s1,8(sp)

72
src/ch2/quicksort.rs
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@ -8,7 +8,7 @@ pub mod tests {
#[test] #[test]
pub fn quicksort_example() { pub fn quicksort_example() {
/* ---------- ---------- quicksort.part.0 ---------- ---------- */ /* ---------- ---------- quicksort.part.0 ---------- ---------- */
let mut entry = Block::new("entry1".into()); let mut entry = Block::new(".entry1".into());
let addispsp_32 = Inst::Add(AddInst::new(REG_SP.into(), REG_SP.into(), (-32).into())); let addispsp_32 = Inst::Add(AddInst::new(REG_SP.into(), REG_SP.into(), (-32).into()));
let sds18sp = Inst::Sd(SdInst::new(REG_S1.into(), (8).into(), REG_SP.into())); let sds18sp = Inst::Sd(SdInst::new(REG_S1.into(), (8).into(), REG_SP.into()));
let sds20sp = Inst::Sd(SdInst::new(REG_S2.into(), (0).into(), REG_SP.into())); let sds20sp = Inst::Sd(SdInst::new(REG_S2.into(), (0).into(), REG_SP.into()));
@ -18,44 +18,44 @@ pub mod tests {
let mvs2a2 = Inst::Mv(MvInst::new(REG_S2.into(), REG_A2.into())); let mvs2a2 = Inst::Mv(MvInst::new(REG_S2.into(), REG_A2.into()));
entry.extend_insts(vec![addispsp_32, sds18sp, sds20sp, sdra24sp, sds016sp, mvs1a0, mvs2a2]); entry.extend_insts(vec![addispsp_32, sds18sp, sds20sp, sdra24sp, sds016sp, mvs1a0, mvs2a2]);
let mut l14 = Block::new("L14".into()); let mut l14 = Block::new(".L14".into());
let sllia5a12 = Inst::Sll(SllInst::new(REG_A5.into(), REG_A1.into(), (2).into())); let sllia5a12 = Inst::Sll(SllInst::new(REG_A5.into(), REG_A1.into(), (2).into()));
let adda5s1a5 = Inst::Add(AddInst::new(REG_A5.into(), REG_S1.into(), REG_A5.into())); let adda5s1a5 = Inst::Add(AddInst::new(REG_A5.into(), REG_S1.into(), REG_A5.into()));
let lwa70a5 = Inst::Lw(LwInst::new(REG_A7.into(), (0).into(), REG_A5.into())); let lwa70a5 = Inst::Lw(LwInst::new(REG_A7.into(), (0).into(), REG_A5.into()));
let mva4s2 = Inst::Mv(MvInst::new(REG_A4.into(), REG_S2.into())); let mva4s2 = Inst::Mv(MvInst::new(REG_A4.into(), REG_S2.into()));
let mva3a1 = Inst::Mv(MvInst::new(REG_A3.into(), REG_A1.into())); let mva3a1 = Inst::Mv(MvInst::new(REG_A3.into(), REG_A1.into()));
let mvs0a1 = Inst::Mv(MvInst::new(REG_S0.into(), REG_A1.into())); let mvs0a1 = Inst::Mv(MvInst::new(REG_S0.into(), REG_A1.into()));
let bgea1s2l3 = Inst::Bge(BgeInst::new(REG_A1.into(), REG_S2.into(), "L3".into())); let bgea1s2l3 = Inst::Bge(BgeInst::new(REG_A1.into(), REG_S2.into(), ".L3".into()));
l14.extend_insts(vec![sllia5a12, adda5s1a5, lwa70a5, mva4s2, mva3a1, mvs0a1, bgea1s2l3]); l14.extend_insts(vec![sllia5a12, adda5s1a5, lwa70a5, mva4s2, mva3a1, mvs0a1, bgea1s2l3]);
let mut l2 = Block::new("L2".into()); let mut l2 = Block::new(".L2".into());
let sllia5a42 = Inst::Sll(SllInst::new(REG_A5.into(), REG_A4.into(), (2).into())); let sllia5a42 = Inst::Sll(SllInst::new(REG_A5.into(), REG_A4.into(), (2).into()));
let adda5s1a5 = Inst::Add(AddInst::new(REG_A5.into(), REG_S1.into(), REG_A5.into())); let adda5s1a5 = Inst::Add(AddInst::new(REG_A5.into(), REG_S1.into(), REG_A5.into()));
let jl11 = Inst::Jmp(JmpInst::new("L11".into())); let jl11 = Inst::Jmp(JmpInst::new(".L11".into()));
l2.extend_insts(vec![sllia5a42, adda5s1a5, jl11]); l2.extend_insts(vec![sllia5a42, adda5s1a5, jl11]);
let mut l5 = Block::new("L5".into()); let mut l5 = Block::new(".L5".into());
// FIXME 这里应该要把 add 改成 addw // FIXME 这里应该要把 add 改成 addw
let addiw1414_1 = Inst::Add(AddInst::new(REG_A4.into(), REG_A4.into(), (-1).into())); let addiw1414_1 = Inst::Add(AddInst::new(REG_A4.into(), REG_A4.into(), (-1).into()));
let beqa4a3l24 = Inst::Beq(BeqInst::new(REG_A4.into(), REG_A3.into(), "L24".into())); let beqa4a3l24 = Inst::Beq(BeqInst::new(REG_A4.into(), REG_A3.into(), ".L24".into()));
l5.extend_insts(vec![addiw1414_1, beqa4a3l24]); l5.extend_insts(vec![addiw1414_1, beqa4a3l24]);
let mut l11 = Block::new("L11".into()); let mut l11 = Block::new(".L11".into());
let lwa60a5 = Inst::Lw(LwInst::new(REG_A6.into(), (0).into(), REG_A5.into())); let lwa60a5 = Inst::Lw(LwInst::new(REG_A6.into(), (0).into(), REG_A5.into()));
let addia5a5_4 = Inst::Add(AddInst::new(REG_A5.into(), REG_A5.into(), (-4).into())); let addia5a5_4 = Inst::Add(AddInst::new(REG_A5.into(), REG_A5.into(), (-4).into()));
let bgea6a7l5 = Inst::Bge(BgeInst::new(REG_A6.into(), REG_A7.into(), "L5".into())); let bgea6a7l5 = Inst::Bge(BgeInst::new(REG_A6.into(), REG_A7.into(), ".L5".into()));
let sllia5a32 = Inst::Sll(SllInst::new(REG_A5.into(), REG_A3.into(), (2).into())); let sllia5a32 = Inst::Sll(SllInst::new(REG_A5.into(), REG_A3.into(), (2).into()));
let adda0s1a5 = Inst::Add(AddInst::new(REG_A0.into(), REG_S1.into(), REG_A5.into())); let adda0s1a5 = Inst::Add(AddInst::new(REG_A0.into(), REG_S1.into(), REG_A5.into()));
let addiws0a31 = Inst::Add(AddInst::new(REG_S0.into(), REG_A3.into(), (1).into())); let addiws0a31 = Inst::Add(AddInst::new(REG_S0.into(), REG_A3.into(), (1).into()));
let blea4a3l4 = Inst::Ble(BleInst::new(REG_A4.into(), REG_A3.into(), "L4".into())); let blea4a3l4 = Inst::Ble(BleInst::new(REG_A4.into(), REG_A3.into(), ".L4".into()));
let sllit1a42 = Inst::Sll(SllInst::new(REG_T1.into(), REG_A4.into(), (2).into())); let sllit1a42 = Inst::Sll(SllInst::new(REG_T1.into(), REG_A4.into(), (2).into()));
let addt1s1t1 = Inst::Add(AddInst::new(REG_T1.into(), REG_S1.into(), REG_T1.into())); let addt1s1t1 = Inst::Add(AddInst::new(REG_T1.into(), REG_S1.into(), REG_T1.into()));
let lwa30t1 = Inst::Lw(LwInst::new(REG_A3.into(), (0).into(), REG_T1.into())); let lwa30t1 = Inst::Lw(LwInst::new(REG_A3.into(), (0).into(), REG_T1.into()));
let swa30a0 = Inst::Sw(SwInst::new(REG_A3.into(), (0).into(), REG_A0.into())); let swa30a0 = Inst::Sw(SwInst::new(REG_A3.into(), (0).into(), REG_A0.into()));
let blea4s0l26 = Inst::Ble(BleInst::new(REG_A4.into(), REG_S0.into(), "L26".into())); let blea4s0l26 = Inst::Ble(BleInst::new(REG_A4.into(), REG_S0.into(), ".L26".into()));
let addia5a54 = Inst::Add(AddInst::new(REG_A5.into(), REG_A5.into(), (4).into())); let addia5a54 = Inst::Add(AddInst::new(REG_A5.into(), REG_A5.into(), (4).into()));
let adda5s1a5 = Inst::Add(AddInst::new(REG_A5.into(), REG_S1.into(), REG_A5.into())); let adda5s1a5 = Inst::Add(AddInst::new(REG_A5.into(), REG_S1.into(), REG_A5.into()));
let jl7 = Inst::Jmp(JmpInst::new("L7".into())); let jl7 = Inst::Jmp(JmpInst::new(".L7".into()));
l11.extend_insts( l11.extend_insts(
vec![ vec![
lwa60a5, lwa60a5,
@ -76,20 +76,20 @@ pub mod tests {
] ]
); );
let mut l9 = Block::new("L9".into()); let mut l9 = Block::new(".L9".into());
let addia5a54 = Inst::Add(AddInst::new(REG_A5.into(), REG_A5.into(), (4).into())); let addia5a54 = Inst::Add(AddInst::new(REG_A5.into(), REG_A5.into(), (4).into()));
let beqa4s0l27 = Inst::Beq(BeqInst::new(REG_A4.into(), REG_S0.into(), "L27".into())); let beqa4s0l27 = Inst::Beq(BeqInst::new(REG_A4.into(), REG_S0.into(), ".L27".into()));
l9.extend_insts(vec![addia5a54, beqa4s0l27]); l9.extend_insts(vec![addia5a54, beqa4s0l27]);
let mut l7 = Block::new("L7".into()); let mut l7 = Block::new(".L7".into());
let lwa60a5 = Inst::Lw(LwInst::new(REG_A6.into(), (0).into(), REG_A5.into())); let lwa60a5 = Inst::Lw(LwInst::new(REG_A6.into(), (0).into(), REG_A5.into()));
let mva3s0 = Inst::Mv(MvInst::new(REG_A3.into(), REG_S0.into())); let mva3s0 = Inst::Mv(MvInst::new(REG_A3.into(), REG_S0.into()));
let addiws0s01 = Inst::Add(AddInst::new(REG_S0.into(), REG_S0.into(), (1).into())); let addiws0s01 = Inst::Add(AddInst::new(REG_S0.into(), REG_S0.into(), (1).into()));
let blta6a7l9 = Inst::Blt(BltInst::new(REG_A6.into(), REG_A7.into(), "L9".into())); let blta6a7l9 = Inst::Blt(BltInst::new(REG_A6.into(), REG_A7.into(), ".L9".into()));
let blea4a3l17 = Inst::Ble(BleInst::new(REG_A4.into(), REG_A3.into(), "L17".into())); let blea4a3l17 = Inst::Ble(BleInst::new(REG_A4.into(), REG_A3.into(), ".L17".into()));
let swa60t1 = Inst::Sw(SwInst::new(REG_A6.into(), (0).into(), REG_T1.into())); let swa60t1 = Inst::Sw(SwInst::new(REG_A6.into(), (0).into(), REG_T1.into()));
let addiwa4a4_1 = Inst::Add(AddInst::new(REG_A4.into(), REG_A4.into(), (-1).into())); let addiwa4a4_1 = Inst::Add(AddInst::new(REG_A4.into(), REG_A4.into(), (-1).into()));
let bgta4a3l2 = Inst::Bgt(BgtInst::new(REG_A4.into(), REG_A3.into(), "L2".into())); let bgta4a3l2 = Inst::Bgt(BgtInst::new(REG_A4.into(), REG_A3.into(), ".L2".into()));
l7.extend_insts( l7.extend_insts(
vec![ vec![
lwa60a5, lwa60a5,
@ -103,25 +103,25 @@ pub mod tests {
] ]
); );
let mut l17 = Block::new("L17".into()); let mut l17 = Block::new(".L17".into());
let mvs0a3 = Inst::Mv(MvInst::new(REG_S0.into(), REG_A3.into())); let mvs0a3 = Inst::Mv(MvInst::new(REG_S0.into(), REG_A3.into()));
let jl10 = Inst::Jmp(JmpInst::new("L10".into())); let jl10 = Inst::Jmp(JmpInst::new(".L10".into()));
l17.extend_insts(vec![mvs0a3, jl10]); l17.extend_insts(vec![mvs0a3, jl10]);
let mut l27 = Block::new("L27".into()); let mut l27 = Block::new(".L27".into());
let siila5s02 = Inst::Sll(SllInst::new(REG_A5.into(), REG_S0.into(), (2).into())); let siila5s02 = Inst::Sll(SllInst::new(REG_A5.into(), REG_S0.into(), (2).into()));
let adda5s1a5 = Inst::Add(AddInst::new(REG_A5.into(), REG_S1.into(), REG_A5.into())); let adda5s1a5 = Inst::Add(AddInst::new(REG_A5.into(), REG_S1.into(), REG_A5.into()));
l27.extend_insts(vec![siila5s02, adda5s1a5]); l27.extend_insts(vec![siila5s02, adda5s1a5]);
let mut l10 = Block::new("L10".into()); let mut l10 = Block::new(".L10".into());
let swa70a5 = Inst::Sw(SwInst::new(REG_A7.into(), (0).into(), REG_A5.into())); let swa70a5 = Inst::Sw(SwInst::new(REG_A7.into(), (0).into(), REG_A5.into()));
let addiwa2s0_1 = Inst::Add(AddInst::new(REG_A2.into(), REG_S0.into(), (-1).into())); let addiwa2s0_1 = Inst::Add(AddInst::new(REG_A2.into(), REG_S0.into(), (-1).into()));
let bgea1a2l3 = Inst::Bge(BgeInst::new(REG_A1.into(), REG_A2.into(), "L3".into())); let bgea1a2l3 = Inst::Bge(BgeInst::new(REG_A1.into(), REG_A2.into(), ".L3".into()));
let mva0s1 = Inst::Mv(MvInst::new(REG_A0.into(), REG_S1.into())); let mva0s1 = Inst::Mv(MvInst::new(REG_A0.into(), REG_S1.into()));
let callQuickSortpart0 = Inst::Call(CallInst::new("QuickSort.part.0".into())); let callQuickSortpart0 = Inst::Call(CallInst::new("QuickSort.part.0".into()));
l10.extend_insts(vec![swa70a5, addiwa2s0_1, bgea1a2l3, mva0s1, callQuickSortpart0]); l10.extend_insts(vec![swa70a5, addiwa2s0_1, bgea1a2l3, mva0s1, callQuickSortpart0]);
let mut l3 = Block::new("L3".into()); let mut l3 = Block::new(".L3".into());
let addiwa1s01 = Inst::Add(AddInst::new(REG_A1.into(), REG_S0.into(), (1).into())); let addiwa1s01 = Inst::Add(AddInst::new(REG_A1.into(), REG_S0.into(), (1).into()));
let ldra24sp = Inst::Ld(LdInst::new(REG_RA.into(), (24).into(), REG_SP.into())); let ldra24sp = Inst::Ld(LdInst::new(REG_RA.into(), (24).into(), REG_SP.into()));
let lds016sp = Inst::Ld(LdInst::new(REG_S0.into(), (16).into(), REG_SP.into())); let lds016sp = Inst::Ld(LdInst::new(REG_S0.into(), (16).into(), REG_SP.into()));
@ -131,18 +131,18 @@ pub mod tests {
let ret = Inst::Ret; let ret = Inst::Ret;
l3.extend_insts(vec![addiwa1s01, ldra24sp, lds016sp, lds18sp, lds20sp, addispsp32, ret]); l3.extend_insts(vec![addiwa1s01, ldra24sp, lds016sp, lds18sp, lds20sp, addispsp32, ret]);
let mut l26 = Block::new("L26".into()); let mut l26 = Block::new(".L26".into());
let mva3s0 = Inst::Mv(MvInst::new(REG_A3.into(), REG_S0.into())); let mva3s0 = Inst::Mv(MvInst::new(REG_A3.into(), REG_S0.into()));
l26.extend_insts(vec![mva3s0]); l26.extend_insts(vec![mva3s0]);
let mut l24 = Block::new("L24".into()); let mut l24 = Block::new(".L24".into());
let sllia5a32 = Inst::Sll(SllInst::new(REG_A5.into(), REG_A3.into(), (2).into())); let sllia5a32 = Inst::Sll(SllInst::new(REG_A5.into(), REG_A3.into(), (2).into()));
l24.extend_insts(vec![sllia5a32]); l24.extend_insts(vec![sllia5a32]);
let mut l4 = Block::new("L4".into()); let mut l4 = Block::new(".L4".into());
let adda5s1a5 = Inst::Add(AddInst::new(REG_A5.into(), REG_S1.into(), REG_A5.into())); let adda5s1a5 = Inst::Add(AddInst::new(REG_A5.into(), REG_S1.into(), REG_A5.into()));
let mvs0a3 = Inst::Mv(MvInst::new(REG_S0.into(), REG_A3.into())); let mvs0a3 = Inst::Mv(MvInst::new(REG_S0.into(), REG_A3.into()));
let jl10 = Inst::Jmp(JmpInst::new("L10".into())); let jl10 = Inst::Jmp(JmpInst::new(".L10".into()));
l4.extend_insts(vec![adda5s1a5, mvs0a3, jl10]); l4.extend_insts(vec![adda5s1a5, mvs0a3, jl10]);
let mut QuickSortPart0 = Func::new("QuickSort.part.0".into(), Vec::new(), entry); let mut QuickSortPart0 = Func::new("QuickSort.part.0".into(), Vec::new(), entry);
@ -161,8 +161,8 @@ pub mod tests {
QuickSortPart0.push_bb(l4); QuickSortPart0.push_bb(l4);
/* ---------- ---------- quicksort ---------- ---------- */ /* ---------- ---------- quicksort ---------- ---------- */
let mut entry = Block::new("entry2".into()); let mut entry = Block::new(".entry2".into());
let bgea1a2l31 = Inst::Bge(BgeInst::new(REG_A1.into(), REG_A2.into(), "L31".into())); let bgea1a2l31 = Inst::Bge(BgeInst::new(REG_A1.into(), REG_A2.into(), ".L31".into()));
let addispsp_16 = Inst::Add(AddInst::new(REG_SP.into(), REG_SP.into(), (-16).into())); let addispsp_16 = Inst::Add(AddInst::new(REG_SP.into(), REG_SP.into(), (-16).into()));
let sdra8sp = Inst::Sd(SdInst::new(REG_RA.into(), (8).into(), REG_SP.into())); let sdra8sp = Inst::Sd(SdInst::new(REG_RA.into(), (8).into(), REG_SP.into()));
let callQuickSortpart0 = Inst::Call(CallInst::new("QuickSort.part.0".into())); let callQuickSortpart0 = Inst::Call(CallInst::new("QuickSort.part.0".into()));
@ -183,7 +183,7 @@ pub mod tests {
] ]
); );
let mut l31 = Block::new("L31".into()); let mut l31 = Block::new(".L31".into());
let lia00 = Inst::Li(LiInst::new(REG_A0.into(), (0).into())); let lia00 = Inst::Li(LiInst::new(REG_A0.into(), (0).into()));
let ret = Inst::Ret; let ret = Inst::Ret;
l31.extend_insts(vec![lia00, ret]); l31.extend_insts(vec![lia00, ret]);
@ -192,7 +192,7 @@ pub mod tests {
QuickSort.push_bb(l31); QuickSort.push_bb(l31);
/* ---------- ---------- main ---------- ---------- */ /* ---------- ---------- main ---------- ---------- */
let mut entry = Block::new("entry3".into()); let mut entry = Block::new(".entry3".into());
let addispsp_32 = Inst::Add(AddInst::new(REG_SP.into(), REG_SP.into(), (-32).into())); let addispsp_32 = Inst::Add(AddInst::new(REG_SP.into(), REG_SP.into(), (-32).into()));
let lia29 = Inst::Li(LiInst::new(REG_A2.into(), (9).into())); let lia29 = Inst::Li(LiInst::new(REG_A2.into(), (9).into()));
let lia10 = Inst::Li(LiInst::new(REG_A1.into(), (10).into())); let lia10 = Inst::Li(LiInst::new(REG_A1.into(), (10).into()));
@ -219,13 +219,13 @@ pub mod tests {
] ]
); );
let mut l35 = Block::new("L35".into()); let mut l35 = Block::new(".L35".into());
let lwa10s0 = Inst::Lw(LwInst::new(REG_A1.into(), (0).into(), REG_S0.into())); let lwa10s0 = Inst::Lw(LwInst::new(REG_A1.into(), (0).into(), REG_S0.into()));
// FIXME lc0 是 .string // FIXME lc0 是 .string
let llaa0lc0 = Inst::La(LaInst::new(REG_A0.into(), "LC0".into())); let llaa0lc0 = Inst::La(LaInst::new(REG_A0.into(), ".LC0".into()));
let addis0s04 = Inst::Add(AddInst::new(REG_S0.into(), REG_S0.into(), (4).into())); let addis0s04 = Inst::Add(AddInst::new(REG_S0.into(), REG_S0.into(), (4).into()));
let callprintf = Inst::Call(CallInst::new("printf@plt".into())); let callprintf = Inst::Call(CallInst::new("printf@plt".into()));
let bnes0s1l35 = Inst::Bne(BneInst::new(REG_S0.into(), REG_S1.into(), "L35".into())); let bnes0s1l35 = Inst::Bne(BneInst::new(REG_S0.into(), REG_S1.into(), ".L35".into()));
let ldra24sp = Inst::Ld(LdInst::new(REG_RA.into(), (24).into(), REG_SP.into())); let ldra24sp = Inst::Ld(LdInst::new(REG_RA.into(), (24).into(), REG_SP.into()));
let lds016sp = Inst::Ld(LdInst::new(REG_S0.into(), (16).into(), REG_SP.into())); let lds016sp = Inst::Ld(LdInst::new(REG_S0.into(), (16).into(), REG_SP.into()));
let lds18sp = Inst::Ld(LdInst::new(REG_S1.into(), (8).into(), REG_SP.into())); let lds18sp = Inst::Ld(LdInst::new(REG_S1.into(), (8).into(), REG_SP.into()));
@ -270,7 +270,7 @@ pub mod tests {
}); });
let lc0 = Var::Str(Str { let lc0 = Var::Str(Str {
name: "LC0".into(), name: ".LC0".into(),
init: Some(" %d\\n".into()), init: Some(" %d\\n".into()),
is_const: true, is_const: true,
}); });

BIN
src/ch4/a.out Executable file
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Binary file not shown.

9
src/ch4/swap.c Normal file
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@ -0,0 +1,9 @@
void swap(int * a, int * b) {
(*a) ^= (*b) ^= (*a) ^= (*b);
}
int main(void) {
int a = 5, b = 10;
swap(&a, &b);
return a;
}

34
src/ch4/swap.s Normal file
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@ -0,0 +1,34 @@
.file "swap.c"
.option nopic
.attribute arch, "rv64i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0"
.attribute unaligned_access, 0
.attribute stack_align, 16
.text
.align 1
.globl swap
.type swap, @function
swap:
lw a4,0(a1)
lw a5,0(a0)
xor a5,a5,a4
sw a5,0(a0)
lw a4,0(a1)
xor a5,a5,a4
sw a5,0(a1)
lw a4,0(a0)
xor a5,a5,a4
sw a5,0(a0)
ret
.size swap, .-swap
.section .text.startup,"ax",@progbits
.align 1
.globl main
.type main, @function
main:
li a0,10
ret
.size main, .-main
.ident "GCC: (Arch Linux Repositories) 14.1.0"
.section .note.GNU-stack,"",@progbits