diff --git a/output.s b/output.s deleted file mode 100644 index e069b60..0000000 --- a/output.s +++ /dev/null @@ -1,7 +0,0 @@ -bb0: -add sp,sp,-32 -sd ra,24(sp) -sd s0,16(sp) -sd s1,8(sp) -sd s2,0(sp) -bge a1,a2,LBB0_17 \ No newline at end of file diff --git a/output/a.out b/output/a.out new file mode 100755 index 0000000..701d29c Binary files /dev/null and b/output/a.out differ diff --git a/output/qs.s b/output/qs.s new file mode 100644 index 0000000..70e6e2e --- /dev/null +++ b/output/qs.s @@ -0,0 +1,162 @@ +.file "test.c" +.option pic +.attribute arch, "rv64i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0" +.attribute unaligned_access, 0 +.attribute stack_align, 16 +.data +.align 3 +.globl arr +.type arr, @object +.size arr, 40 +arr: +.word 0x4 +.word 0x3 +.word 0x9 +.word 0x2 +.word 0x0 +.word 0x1 +.word 0x6 +.word 0x5 +.word 0x7 +.word 0x8 +.zero 0 +.globl LC0 +.section .rodata +.align 3 +LC0: +.string " %d\n" + +.text +.align 3 +.globl QuickSort +.type QuickSort, @function +QuickSort: +entry2: +bge a1,a1,L31 +addi sp,sp,-16 +sd ra,8(sp) +call QuickSort.part.0 +ld ra,8(sp) +li a0,0 +addi sp,sp,16 +ret +L31: +li a0,0 +ret +.size QuickSort, .-QuickSort +.text +.align 3 +.globl QuickSort.part.0 +.type QuickSort.part.0, @function +QuickSort.part.0: +entry1: +addi sp,sp,-32 +sd s1,8(sp) +sd s2,0(sp) +sd ra,24(sp) +sd s0,16(sp) +mv s1,a0 +mv s2,a2 +L10: +sw a7,0(a5) +addi a2,s0,-1 +bge a1,a1,L3 +mv a0,s1 +call QuickSort.part.0 +L11: +lw a6,0(a5) +addi a5,a5,-4 +bge a6,a6,L5 +slli a5,a3,2 +add a0,s1,a5 +addi s0,a3,1 +ble a4,a4,L4 +slli t1,a4,2 +add t1,s1,t1 +lw a3,0(t1) +sw a3,0(a0) +ble a4,a4,L26 +addi a5,a5,4 +add a5,s1,a5 +j L7 +L14: +slli a5,a1,2 +add a5,s1,a5 +lw a7,0(a5) +mv a4,s2 +mv a3,a1 +mv s0,a1 +bge a1,a1,L3 +L17: +mv s0,a3 +j L10 +L2: +slli a5,a4,2 +add a5,s1,a5 +j L11 +L24: +slli a5,a3,2 +L26: +mv a3,s0 +L27: +slli a5,s0,2 +add a5,s1,a5 +L3: +addi a1,s0,1 +ld ra,24(sp) +ld s0,16(sp) +ld s1,8(sp) +ld s2,0(sp) +addi sp,sp,32 +ret +L4: +add a5,s1,a5 +mv s0,a3 +j L10 +L5: +addi a4,a4,-1 +beq a4,a4,L24 +L7: +lw a6,0(a5) +mv a3,s0 +addi s0,s0,1 +blt a6,a6,L9 +ble a4,a4,L17 +sw a6,0(t1) +addi a4,a4,-1 +bgt a4,a4,L2 +L9: +addi a5,a5,4 +beq a4,a4,L27 +.size QuickSort.part.0, .-QuickSort.part.0 +.text +.align 3 +.globl main +.type main, @function +main: +entry3: +addi sp,sp,-32 +li a2,9 +li a1,10 +la s0,arr +sd s0,16(sp) +sd s1,8(sp) +sd ra,24(sp) +la s0,arr +call QuickSort.part.0 +la s1,arr+40 +L35: +lw a1,0(s0) +la a0,LC0 +addi s0,s0,4 +call printf@plt +bne s0,s0,L35 +ld ra,24(sp) +ld s0,16(sp) +ld s1,8(sp) +li a0,0 +addi sp,sp,32 +ret +.size main, .-main +.ident "compiler: (visionfive2) 0.1.0" +.section .note.GNU-stack,"",@progbits diff --git a/shell.nix b/shell.nix deleted file mode 100644 index 4ee1eb9..0000000 --- a/shell.nix +++ /dev/null @@ -1,17 +0,0 @@ -{ pkgs ? import { } }: -pkgs.mkShell { - nativeBuildInputs = with pkgs; [ rustc cargo gcc rustfmt clippy ]; - - # Certain Rust tools won't work without this - # This can also be fixed by using oxalica/rust-overlay and specifying the rust-src extension - # See https://discourse.nixos.org/t/rust-src-not-found-and-other-misadventures-of-developing-rust-on-nixos/11570/3?u=samuela. for more details. - RUST_SRC_PATH = "${pkgs.rust.packages.stable.rustPlatform.rustLibSrc}"; - shellHook = '' - # Set fish as the default shell - SHELL=${pkgs.fish}/bin/fish - - # Configure git - git config --global user.name "wangfiox" - git config --global user.email "wangfiox@gmail.com" - ''; -} diff --git a/src/ch2/quicksort.rs b/src/ch2/quicksort.rs index dc98292..edbe7a5 100644 --- a/src/ch2/quicksort.rs +++ b/src/ch2/quicksort.rs @@ -1,224 +1,258 @@ // #[cfg(test)] pub mod tests { + use std::{ fs::File, io::Write, vec }; + use compiler::backend::*; use var::*; #[test] pub fn quicksort_example() { - let mut entry = Block::new("entry".into()); + /* ---------- ---------- quicksort.part.0 ---------- ---------- */ + let mut entry = Block::new("entry1".into()); let addispsp_32 = Inst::Add(AddInst::new(REG_SP.into(), REG_SP.into(), (-32).into())); - let sdra24sp = Inst::Sd(SdInst::new(REG_RA.into(), (24).into(), REG_SP.into())); - let sds016sp = Inst::Sd(SdInst::new(REG_S0.into(), (16).into(), REG_SP.into())); let sds18sp = Inst::Sd(SdInst::new(REG_S1.into(), (8).into(), REG_SP.into())); let sds20sp = Inst::Sd(SdInst::new(REG_S2.into(), (0).into(), REG_SP.into())); - let bgea1a2lbb0_17 = Inst::Bge( - BgeInst::new(REG_A1.into(), REG_A2.into(), "LBB0_17".into()) - ); - entry.extend_insts(vec![addispsp_32, sdra24sp, sds016sp, sds18sp, sds20sp, bgea1a2lbb0_17]); - let mvs2a2 = Inst::Mv(MvInst::new(REG_S2.into(), REG_A2.into())); + let sdra24sp = Inst::Sd(SdInst::new(REG_RA.into(), (24).into(), REG_SP.into())); + let sds016sp = Inst::Sd(SdInst::new(REG_S0.into(), (16).into(), REG_SP.into())); let mvs1a0 = Inst::Mv(MvInst::new(REG_S1.into(), REG_A0.into())); - let jlbb0_3 = Inst::Jmp(JmpInst::new("LBB0_3".into())); - entry.extend_insts(vec![mvs2a2, mvs1a0, jlbb0_3]); + let mvs2a2 = Inst::Mv(MvInst::new(REG_S2.into(), REG_A2.into())); + entry.extend_insts(vec![addispsp_32, sds18sp, sds20sp, sdra24sp, sds016sp, mvs1a0, mvs2a2]); - let mut lbb0_2 = Block::new("lbb0_2".into()); - let sllia2s02 = Inst::Sll(SllInst::new(REG_A2.into(), REG_S0.into(), (2).into())); - let adda2a2s1 = Inst::Add(AddInst::new(REG_A2.into(), REG_A2.into(), REG_S1.into())); - // let swa00a2 = Inst::Sw(SwInst::new(REG_A0.into(), (0).into(), REG_A2.into())); - let addia2s0_1 = Inst::Add(AddInst::new(REG_A2.into(), REG_S0.into(), (-1).into())); - let mva0s1 = Inst::Mv(MvInst::new(REG_A0.into(), REG_S1.into())); - let callquicksort = Inst::Call(CallInst::new("QuickSort".into())); - let addia1s01 = Inst::Add(AddInst::new(REG_A1.into(), REG_S0.into(), (1).into())); - let bgea1s2lbb0_17 = Inst::Bge( - BgeInst::new(REG_A1.into(), REG_S2.into(), "LBB0_17".into()) - ); - lbb0_2.extend_insts( + let mut l14 = Block::new("L14".into()); + let sllia5a12 = Inst::Sll(SllInst::new(REG_A5.into(), REG_A1.into(), (2).into())); + let adda5s1a5 = Inst::Add(AddInst::new(REG_A5.into(), REG_S1.into(), REG_A5.into())); + let lwa70a5 = Inst::Lw(LwInst::new(REG_A7.into(), (0).into(), REG_A5.into())); + let mva4s2 = Inst::Mv(MvInst::new(REG_A4.into(), REG_S2.into())); + let mva3a1 = Inst::Mv(MvInst::new(REG_A3.into(), REG_A1.into())); + let mvs0a1 = Inst::Mv(MvInst::new(REG_S0.into(), REG_A1.into())); + let bgea1s2l3 = Inst::Bge(BgeInst::new(REG_A1.into(), REG_S2.into(), "L3".into())); + l14.extend_insts(vec![sllia5a12, adda5s1a5, lwa70a5, mva4s2, mva3a1, mvs0a1, bgea1s2l3]); + + let mut l2 = Block::new("L2".into()); + let sllia5a42 = Inst::Sll(SllInst::new(REG_A5.into(), REG_A4.into(), (2).into())); + let adda5s1a5 = Inst::Add(AddInst::new(REG_A5.into(), REG_S1.into(), REG_A5.into())); + let jl11 = Inst::Jmp(JmpInst::new("L11".into())); + l2.extend_insts(vec![sllia5a42, adda5s1a5, jl11]); + + let mut l5 = Block::new("L5".into()); + // FIXME 这里应该要把 add 改成 addw + let addiw1414_1 = Inst::Add(AddInst::new(REG_A4.into(), REG_A4.into(), (-1).into())); + let beqa4a3l24 = Inst::Beq(BeqInst::new(REG_A4.into(), REG_A3.into(), "L24".into())); + l5.extend_insts(vec![addiw1414_1, beqa4a3l24]); + + let mut l11 = Block::new("L11".into()); + let lwa60a5 = Inst::Lw(LwInst::new(REG_A6.into(), (0).into(), REG_A5.into())); + let addia5a5_4 = Inst::Add(AddInst::new(REG_A5.into(), REG_A5.into(), (-4).into())); + let bgea6a7l5 = Inst::Bge(BgeInst::new(REG_A6.into(), REG_A7.into(), "L5".into())); + let sllia5a32 = Inst::Sll(SllInst::new(REG_A5.into(), REG_A3.into(), (2).into())); + let adda0s1a5 = Inst::Add(AddInst::new(REG_A0.into(), REG_S1.into(), REG_A5.into())); + let addiws0a31 = Inst::Add(AddInst::new(REG_S0.into(), REG_A3.into(), (1).into())); + let blea4a3l4 = Inst::Ble(BleInst::new(REG_A4.into(), REG_A3.into(), "L4".into())); + let sllit1a42 = Inst::Sll(SllInst::new(REG_T1.into(), REG_A4.into(), (2).into())); + let addt1s1t1 = Inst::Add(AddInst::new(REG_T1.into(), REG_S1.into(), REG_T1.into())); + let lwa30t1 = Inst::Lw(LwInst::new(REG_A3.into(), (0).into(), REG_T1.into())); + let swa30a0 = Inst::Sw(SwInst::new(REG_A3.into(), (0).into(), REG_A0.into())); + let blea4s0l26 = Inst::Ble(BleInst::new(REG_A4.into(), REG_S0.into(), "L26".into())); + let addia5a54 = Inst::Add(AddInst::new(REG_A5.into(), REG_A5.into(), (4).into())); + let adda5s1a5 = Inst::Add(AddInst::new(REG_A5.into(), REG_S1.into(), REG_A5.into())); + let jl7 = Inst::Jmp(JmpInst::new("L7".into())); + l11.extend_insts( vec![ - sllia2s02, - adda2a2s1, - // swa00a2, - addia2s0_1, - mva0s1, - callquicksort, - addia1s01, - bgea1s2lbb0_17 + lwa60a5, + addia5a5_4, + bgea6a7l5, + sllia5a32, + adda0s1a5, + addiws0a31, + blea4a3l4, + sllit1a42, + addt1s1t1, + lwa30t1, + swa30a0, + blea4s0l26, + addia5a54, + adda5s1a5, + jl7 ] ); - let mut lbb0_3 = Block::new("LBB0_3".into()); - let sllia0a12 = Inst::Sll(SllInst::new(REG_A0.into(), REG_A1.into(), (2).into())); - let adda0a0s1 = Inst::Add(AddInst::new(REG_A0.into(), REG_A0.into(), REG_S1.into())); - // let lwa00a0 = Inst::Lw(LwInst::new(REG_A0.into(), (0).into(), REG_A0.into())); - let mvs0a1 = Inst::Mv(MvInst::new(REG_S0.into(), REG_A1.into())); - let bgea1s2lbb0_2 = Inst::Bge(BgeInst::new(REG_A1.into(), REG_S2.into(), "LBB0_2".into())); - lbb0_3.extend_insts(vec![sllia0a12, adda0a0s1, /* lwa00a0, */ mvs0a1, bgea1s2lbb0_2]); - let mvs0a1 = Inst::Mv(MvInst::new(REG_S0.into(), REG_A1.into())); - let mva2s2 = Inst::Mv(MvInst::new(REG_A2.into(), REG_S2.into())); - let jlbb0_7 = Inst::Jmp(JmpInst::new("LBB0_7".into())); - lbb0_3.extend_insts(vec![mvs0a1, mva2s2, jlbb0_7]); + let mut l9 = Block::new("L9".into()); + let addia5a54 = Inst::Add(AddInst::new(REG_A5.into(), REG_A5.into(), (4).into())); + let beqa4s0l27 = Inst::Beq(BeqInst::new(REG_A4.into(), REG_S0.into(), "L27".into())); + l9.extend_insts(vec![addia5a54, beqa4s0l27]); - let mut lbb0_5 = Block::new("LBB0_5".into()); - let sllis3s22 = Inst::Sll(SllInst::new(REG_S3.into(), REG_S2.into(), (2).into())); - let adda3a3s1 = Inst::Add(AddInst::new(REG_A3.into(), REG_A3.into(), REG_S1.into())); - // let swa40a3 = Inst::Sw(SwInst::new(REG_A4.into(), (0).into(), REG_A3.into())); - let addia2a2_1 = Inst::Add(AddInst::new(REG_A2.into(), REG_A2.into(), (-1).into())); - lbb0_5.extend_insts(vec![sllis3s22, adda3a3s1, /* swa40a3, */ addia2a2_1]); - - let mut llb0_6 = Block::new("LBB0_6".into()); - let bges0a2lbb0_2 = Inst::Bge(BgeInst::new(REG_S0.into(), REG_A2.into(), "LBB0_2".into())); - llb0_6.extend_insts(vec![bges0a2lbb0_2]); - - let mut lbb0_7 = Block::new("LBB0_7".into()); - let bges0a2lbb0_11 = Inst::Bge( - BgeInst::new(REG_S0.into(), REG_A2.into(), "LBB0_11".into()) + let mut l7 = Block::new("L7".into()); + let lwa60a5 = Inst::Lw(LwInst::new(REG_A6.into(), (0).into(), REG_A5.into())); + let mva3s0 = Inst::Mv(MvInst::new(REG_A3.into(), REG_S0.into())); + let addiws0s01 = Inst::Add(AddInst::new(REG_S0.into(), REG_S0.into(), (1).into())); + let blta6a7l9 = Inst::Blt(BltInst::new(REG_A6.into(), REG_A7.into(), "L9".into())); + let blea4a3l17 = Inst::Ble(BleInst::new(REG_A4.into(), REG_A3.into(), "L17".into())); + let swa60t1 = Inst::Sw(SwInst::new(REG_A6.into(), (0).into(), REG_T1.into())); + let addiwa4a4_1 = Inst::Add(AddInst::new(REG_A4.into(), REG_A4.into(), (-1).into())); + let bgta4a3l2 = Inst::Bgt(BgtInst::new(REG_A4.into(), REG_A3.into(), "L2".into())); + l7.extend_insts( + vec![ + lwa60a5, + mva3s0, + addiws0s01, + blta6a7l9, + blea4a3l17, + swa60t1, + addiwa4a4_1, + bgta4a3l2 + ] ); - lbb0_7.extend_insts(vec![bges0a2lbb0_11]); - let sllia3a22 = Inst::Sll(SllInst::new(REG_A3.into(), REG_A2.into(), (2).into())); - let adda3a3s1 = Inst::Add(AddInst::new(REG_A3.into(), REG_A3.into(), REG_S1.into())); - let mva4a2 = Inst::Mv(MvInst::new(REG_A4.into(), REG_A2.into())); - lbb0_7.extend_insts(vec![sllia3a22, adda3a3s1, mva4a2]); - let mut lbb0_9 = Block::new("LBB0_9".into()); - // let lwa50a3 = Inst::Lw(LwInst::new(REG_A5.into(), (0).into(), REG_A3.into())); - let blta5a0lbb0_12 = Inst::Blt( - BltInst::new(REG_A5.into(), REG_A0.into(), "LBB0_12".into()) - ); - lbb0_9.extend_insts(vec![/* lwa50a3, */ blta5a0lbb0_12]); - let addia4a4_1 = Inst::Add(AddInst::new(REG_A4.into(), REG_A4.into(), (-1).into())); - let addia2a2_1 = Inst::Add(AddInst::new(REG_A2.into(), REG_A2.into(), (-1).into())); - let addia3a3_4 = Inst::Add(AddInst::new(REG_A3.into(), REG_A3.into(), (-4).into())); - let blts0a4lbb0_9 = Inst::Blt(BltInst::new(REG_S0.into(), REG_A4.into(), "LBB0_9".into())); - lbb0_9.extend_insts(vec![addia4a4_1, addia2a2_1, addia3a3_4, blts0a4lbb0_9]); + let mut l17 = Block::new("L17".into()); + let mvs0a3 = Inst::Mv(MvInst::new(REG_S0.into(), REG_A3.into())); + let jl10 = Inst::Jmp(JmpInst::new("L10".into())); + l17.extend_insts(vec![mvs0a3, jl10]); - let mut lbb0_11 = Block::new("LBB0_11".into()); - let bges0a2lbb0_6 = Inst::Bge(BgeInst::new(REG_S0.into(), REG_A2.into(), "LBB0_6".into())); - let jlbb0_13 = Inst::Jmp(JmpInst::new("LBB0_13".into())); - lbb0_11.extend_insts(vec![bges0a2lbb0_6, jlbb0_13]); + let mut l27 = Block::new("L27".into()); + let siila5s02 = Inst::Sll(SllInst::new(REG_A5.into(), REG_S0.into(), (2).into())); + let adda5s1a5 = Inst::Add(AddInst::new(REG_A5.into(), REG_S1.into(), REG_A5.into())); + l27.extend_insts(vec![siila5s02, adda5s1a5]); - let mut lbb0_12 = Block::new("LBB0_12".into()); - let sllia3s02 = Inst::Sll(SllInst::new(REG_A3.into(), REG_S0.into(), (2).into())); - let adda3a3s1 = Inst::Add(AddInst::new(REG_A3.into(), REG_A3.into(), REG_S1.into())); - // let swa50a3 = Inst::Sw(SwInst::new(REG_A5.into(), (0).into(), REG_A3.into())); - let addis0s01 = Inst::Add(AddInst::new(REG_S0.into(), REG_S0.into(), (1).into())); - let bges0a2lbb0_6 = Inst::Bge(BgeInst::new(REG_S0.into(), REG_A2.into(), "LBB0_6".into())); - lbb0_12.extend_insts(vec![sllia3s02, adda3a3s1, /* swa50a3, */ addis0s01, bges0a2lbb0_6]); + let mut l10 = Block::new("L10".into()); + let swa70a5 = Inst::Sw(SwInst::new(REG_A7.into(), (0).into(), REG_A5.into())); + let addiwa2s0_1 = Inst::Add(AddInst::new(REG_A2.into(), REG_S0.into(), (-1).into())); + let bgea1a2l3 = Inst::Bge(BgeInst::new(REG_A1.into(), REG_A2.into(), "L3".into())); + let mva0s1 = Inst::Mv(MvInst::new(REG_A0.into(), REG_S1.into())); + let callQuickSortpart0 = Inst::Call(CallInst::new("QuickSort.part.0".into())); + l10.extend_insts(vec![swa70a5, addiwa2s0_1, bgea1a2l3, mva0s1, callQuickSortpart0]); - let mut lbb0_13 = Block::new("LBB0_13".into()); - let sllia3s02 = Inst::Sll(SllInst::new(REG_A3.into(), REG_S0.into(), (2).into())); - let adda3a3s1 = Inst::Add(AddInst::new(REG_A3.into(), REG_A3.into(), REG_S1.into())); - lbb0_13.extend_insts(vec![sllia3s02, adda3a3s1]); - - let mut lbb0_14 = Block::new("LBB0_14".into()); - // let lwa40a3 = Inst::Lw(LwInst::new(REG_A4.into(), (0).into(), REG_A3.into())); - let bgea4a0lbb0_5 = Inst::Bge(BgeInst::new(REG_A4.into(), REG_A0.into(), "LBB0_5".into())); - lbb0_14.extend_insts(vec![/* lwa40a3, */ bgea4a0lbb0_5]); - // push_inst lw - let addis0s01 = Inst::Add(AddInst::new(REG_S0.into(), REG_S0.into(), (1).into())); - let addia3a34 = Inst::Add(AddInst::new(REG_A3.into(), REG_A3.into(), (4).into())); - let bnea2s0lbb0_14 = Inst::Bne( - BneInst::new(REG_A2.into(), REG_S0.into(), "LBB0_14".into()) - ); - lbb0_14.extend_insts(vec![addis0s01, addia3a34, bnea2s0lbb0_14]); - let mvs0a2 = Inst::Mv(MvInst::new(REG_S0.into(), REG_A2.into())); - let jlbb0_2 = Inst::Jmp(JmpInst::new("LBB0_2".into())); - lbb0_14.extend_insts(vec![mvs0a2, jlbb0_2]); - - let mut lbb0_17 = Block::new("LBB0_17".into()); - let lia00 = Inst::Add(AddInst::new(REG_A0.into(), REG_ZERO.into(), (0).into())); + let mut l3 = Block::new("L3".into()); + let addiwa1s01 = Inst::Add(AddInst::new(REG_A1.into(), REG_S0.into(), (1).into())); let ldra24sp = Inst::Ld(LdInst::new(REG_RA.into(), (24).into(), REG_SP.into())); let lds016sp = Inst::Ld(LdInst::new(REG_S0.into(), (16).into(), REG_SP.into())); let lds18sp = Inst::Ld(LdInst::new(REG_S1.into(), (8).into(), REG_SP.into())); let lds20sp = Inst::Ld(LdInst::new(REG_S2.into(), (0).into(), REG_SP.into())); let addispsp32 = Inst::Add(AddInst::new(REG_SP.into(), REG_SP.into(), (32).into())); let ret = Inst::Ret; - lbb0_17.extend_insts(vec![lia00, ldra24sp, lds016sp, lds18sp, lds20sp, addispsp32, ret]); + l3.extend_insts(vec![addiwa1s01, ldra24sp, lds016sp, lds18sp, lds20sp, addispsp32, ret]); - let mut quickSort = Func::new("QuickSort".into(), Vec::new(), entry); - quickSort.push_bb(lbb0_2); - quickSort.push_bb(lbb0_3); - quickSort.push_bb(lbb0_5); - quickSort.push_bb(llb0_6); - quickSort.push_bb(lbb0_7); - quickSort.push_bb(lbb0_9); - quickSort.push_bb(lbb0_11); - quickSort.push_bb(lbb0_12); - quickSort.push_bb(lbb0_13); - quickSort.push_bb(lbb0_14); - quickSort.push_bb(lbb0_17); + let mut l26 = Block::new("L26".into()); + let mva3s0 = Inst::Mv(MvInst::new(REG_A3.into(), REG_S0.into())); + l26.extend_insts(vec![mva3s0]); - let mut entry = Block::new("entry".into()); + let mut l24 = Block::new("L24".into()); + let sllia5a32 = Inst::Sll(SllInst::new(REG_A5.into(), REG_A3.into(), (2).into())); + l24.extend_insts(vec![sllia5a32]); + + let mut l4 = Block::new("L4".into()); + let adda5s1a5 = Inst::Add(AddInst::new(REG_A5.into(), REG_S1.into(), REG_A5.into())); + let mvs0a3 = Inst::Mv(MvInst::new(REG_S0.into(), REG_A3.into())); + let jl10 = Inst::Jmp(JmpInst::new("L10".into())); + l4.extend_insts(vec![adda5s1a5, mvs0a3, jl10]); + + let mut QuickSortPart0 = Func::new("QuickSort.part.0".into(), Vec::new(), entry); + QuickSortPart0.push_bb(l14); + QuickSortPart0.push_bb(l2); + QuickSortPart0.push_bb(l5); + QuickSortPart0.push_bb(l11); + QuickSortPart0.push_bb(l9); + QuickSortPart0.push_bb(l7); + QuickSortPart0.push_bb(l17); + QuickSortPart0.push_bb(l27); + QuickSortPart0.push_bb(l10); + QuickSortPart0.push_bb(l3); + QuickSortPart0.push_bb(l26); + QuickSortPart0.push_bb(l24); + QuickSortPart0.push_bb(l4); + + /* ---------- ---------- quicksort ---------- ---------- */ + let mut entry = Block::new("entry2".into()); + let bgea1a2l31 = Inst::Bge(BgeInst::new(REG_A1.into(), REG_A2.into(), "L31".into())); + let addispsp_16 = Inst::Add(AddInst::new(REG_SP.into(), REG_SP.into(), (-16).into())); + let sdra8sp = Inst::Sd(SdInst::new(REG_RA.into(), (8).into(), REG_SP.into())); + let callQuickSortpart0 = Inst::Call(CallInst::new("QuickSort.part.0".into())); + let ldra8sp = Inst::Ld(LdInst::new(REG_RA.into(), (8).into(), REG_SP.into())); + let lia00 = Inst::Li(LiInst::new(REG_A0.into(), (0).into())); + let addispsp16 = Inst::Add(AddInst::new(REG_SP.into(), REG_SP.into(), (16).into())); + let ret = Inst::Ret; + entry.extend_insts( + vec![ + bgea1a2l31, + addispsp_16, + sdra8sp, + callQuickSortpart0, + ldra8sp, + lia00, + addispsp16, + ret + ] + ); + + let mut l31 = Block::new("L31".into()); + let lia00 = Inst::Li(LiInst::new(REG_A0.into(), (0).into())); + let ret = Inst::Ret; + l31.extend_insts(vec![lia00, ret]); + + let mut QuickSort = Func::new("QuickSort".into(), Vec::new(), entry); + QuickSort.push_bb(l31); + + /* ---------- ---------- main ---------- ---------- */ + let mut entry = Block::new("entry3".into()); let addispsp_32 = Inst::Add(AddInst::new(REG_SP.into(), REG_SP.into(), (-32).into())); - let lia29 = Inst::Add(AddInst::new(REG_A2.into(), REG_ZERO.into(), (9).into())); - let lia10 = Inst::Add(AddInst::new(REG_A0.into(), REG_ZERO.into(), (9).into())); - // lla a0 arr - let llaa0arr = Inst::La(LaInst::new(REG_A0.into(), "arr".into())); + let lia29 = Inst::Li(LiInst::new(REG_A2.into(), (9).into())); + let lia10 = Inst::Li(LiInst::new(REG_A1.into(), (10).into())); + let llas0arr1 = Inst::La(LaInst::new(REG_S0.into(), "arr".into())); let sds016sp = Inst::Sd(SdInst::new(REG_S0.into(), (16).into(), REG_SP.into())); let sds18sp = Inst::Sd(SdInst::new(REG_S1.into(), (8).into(), REG_SP.into())); - let sds20sp = Inst::Sd(SdInst::new(REG_S2.into(), (0).into(), REG_SP.into())); let sdra24sp = Inst::Sd(SdInst::new(REG_RA.into(), (24).into(), REG_SP.into())); - // lla s0 arr - let llas0arr = Inst::La(LaInst::new(REG_S0.into(), "arr".into())); - let callquicksort = Inst::Call(CallInst::new("QuickSort".into())); - // lla s2 arr+40 - let llas2arr = Inst::La(LaInst::new(REG_S2.into(), "arr+40".into())); - // lla s1 LC0 , lc0 is .string "%d\n" - let llas1lc0 = Inst::La(LaInst::new(REG_S1.into(), "LC0".into())); + let llas0arr2 = Inst::La(LaInst::new(REG_S0.into(), "arr".into())); + let callQuickSortPart0 = Inst::Call(CallInst::new("QuickSort.part.0".into())); + // FIXME 这里可能 arr + 40 不能汇编过 + let llas1arr40 = Inst::La(LaInst::new(REG_S1.into(), "arr+40".into())); entry.extend_insts( vec![ addispsp_32, lia29, lia10, - /* lla a0, arr */ llaa0arr, + llas0arr1, sds016sp, sds18sp, - sds20sp, sdra24sp, - llas0arr, - callquicksort, - llas2arr, - llas1lc0 + llas0arr2, + callQuickSortPart0, + llas1arr40 ] ); let mut l35 = Block::new("L35".into()); - // let lwa10s0 = Inst::Lw(LwInst::new(REG_A1.into(), (0).into(), REG_S0.into())); - let mva0s1 = Inst::Mv(MvInst::new(REG_A0.into(), REG_S1.into())); + let lwa10s0 = Inst::Lw(LwInst::new(REG_A1.into(), (0).into(), REG_S0.into())); + // FIXME lc0 是 .string + let llaa0lc0 = Inst::La(LaInst::new(REG_A0.into(), "LC0".into())); let addis0s04 = Inst::Add(AddInst::new(REG_S0.into(), REG_S0.into(), (4).into())); let callprintf = Inst::Call(CallInst::new("printf@plt".into())); - let bnes0s2l35 = Inst::Bne(BneInst::new(REG_S0.into(), REG_S2.into(), "L35".into())); + let bnes0s1l35 = Inst::Bne(BneInst::new(REG_S0.into(), REG_S1.into(), "L35".into())); let ldra24sp = Inst::Ld(LdInst::new(REG_RA.into(), (24).into(), REG_SP.into())); let lds016sp = Inst::Ld(LdInst::new(REG_S0.into(), (16).into(), REG_SP.into())); let lds18sp = Inst::Ld(LdInst::new(REG_S1.into(), (8).into(), REG_SP.into())); - let lds20sp = Inst::Ld(LdInst::new(REG_S2.into(), (0).into(), REG_SP.into())); - let lia00 = Inst::Add(AddInst::new(REG_A0.into(), REG_ZERO.into(), (0).into())); + let lia00 = Inst::Li(LiInst::new(REG_A0.into(), (0).into())); let addispsp32 = Inst::Add(AddInst::new(REG_SP.into(), REG_SP.into(), (32).into())); let ret = Inst::Ret; l35.extend_insts( vec![ - // lwa10s0, - mva0s1, + lwa10s0, + llaa0lc0, addis0s04, callprintf, - bnes0s2l35, + bnes0s1l35, ldra24sp, lds016sp, lds18sp, - lds20sp, lia00, addispsp32, ret ] ); - let mut Main = Func::new("main".into(), Vec::new(), entry); - Main.push_bb(l35); - let lc0 = Var::Str(Str { - name: "LC0".into(), - init: Some("%d\n".to_string()), - is_const: true, - }); + let mut main = Func::new("main".into(), Vec::new(), entry); + main.push_bb(l35); let arr = Var::IntArr(ArrVar { - name: "arr".to_string(), + name: "arr".into(), capacity: 10, init: vec![ (0, 4), @@ -230,17 +264,27 @@ pub mod tests { (6, 6), (7, 5), (8, 7), - (9, 9) + (9, 8) ], is_const: false, }); - let main_module = Module { - name: "main".into(), - global: vec![lc0, arr], - funcs: vec![Main, quickSort], - entry: Some("main".to_string()), + let lc0 = Var::Str(Str { + name: "LC0".into(), + init: Some(" %d\\n".into()), + is_const: true, + }); + + let module = Module { + name: "qs.into()".into(), + global: vec![arr, lc0], + funcs: vec![QuickSortPart0, QuickSort, main], + entry: Some("main".into()), }; - print!("{}", main_module.gen_asm()); + + let asm = module.gen_asm(); + + let mut file = File::create("output/qs.s").unwrap(); + file.write_all(asm.as_bytes()); } } diff --git a/src/ch2/quicksort.s b/src/ch2/quicksort.s index 4253e7c..3c68acb 100644 --- a/src/ch2/quicksort.s +++ b/src/ch2/quicksort.s @@ -7,6 +7,7 @@ .align 1 .type QuickSort.part.0, @function QuickSort.part.0: +.LFB13: addi sp,sp,-32 sd s1,8(sp) sd s2,0(sp) @@ -14,7 +15,7 @@ QuickSort.part.0: sd s0,16(sp) mv s1,a0 mv s2,a2 -.L12: +.L14: slli a5,a1,2 add a5,s1,a5 lw a7,0(a5) @@ -25,11 +26,11 @@ QuickSort.part.0: .L2: slli a5,a4,2 add a5,s1,a5 - j .L10 + j .L11 .L5: addiw a4,a4,-1 - beq a4,a3,.L22 -.L10: + beq a4,a3,.L24 +.L11: lw a6,0(a5) addi a5,a5,-4 bge a6,a7,.L5 @@ -41,57 +42,60 @@ QuickSort.part.0: add t1,s1,t1 lw a3,0(t1) sw a3,0(a0) - ble a4,s0,.L24 + ble a4,s0,.L26 addi a5,a5,4 add a5,s1,a5 j .L7 .L9: addi a5,a5,4 - beq a4,s0,.L25 + beq a4,s0,.L27 .L7: lw a6,0(a5) mv a3,s0 addiw s0,s0,1 blt a6,a7,.L9 - ble a4,a3,.L15 + ble a4,a3,.L17 sw a6,0(t1) addiw a4,a4,-1 bgt a4,a3,.L2 -.L15: +.L17: mv s0,a3 - j .L3 -.L25: + j .L10 +.L27: slli a5,s0,2 add a5,s1,a5 -.L3: +.L10: sw a7,0(a5) addiw a2,s0,-1 - bge a1,a2,.L11 + bge a1,a2,.L3 mv a0,s1 call QuickSort.part.0 -.L11: +.L3: addiw a1,s0,1 - blt a1,s2,.L12 + blt a1,s2,.L14 ld ra,24(sp) ld s0,16(sp) ld s1,8(sp) ld s2,0(sp) addi sp,sp,32 jr ra -.L24: +.L26: mv a3,s0 -.L22: +.L24: slli a5,a3,2 .L4: add a5,s1,a5 mv s0,a3 - j .L3 + j .L10 +.LFE13: .size QuickSort.part.0, .-QuickSort.part.0 + .align 1 .globl QuickSort .type QuickSort, @function QuickSort: - bge a1,a2,.L29 +.LFB11: + bge a1,a2,.L31 addi sp,sp,-16 sd ra,8(sp) call QuickSort.part.0 @@ -99,45 +103,48 @@ QuickSort: li a0,0 addi sp,sp,16 jr ra -.L29: +.L31: li a0,0 ret +.LFE11: .size QuickSort, .-QuickSort + .section .rodata.str1.8,"aMS",@progbits,1 .align 3 .LC0: .string "%d\n" + .section .text.startup,"ax",@progbits .align 1 .globl main .type main, @function main: +.LFB12: addi sp,sp,-32 li a2,9 li a1,0 lla a0,.LANCHOR0 sd s0,16(sp) sd s1,8(sp) - sd s2,0(sp) sd ra,24(sp) lla s0,.LANCHOR0 call QuickSort.part.0 - lla s2,.LANCHOR0+40 - lla s1,.LC0 -.L33: + lla s1,.LANCHOR0+40 +.L35: lw a1,0(s0) - mv a0,s1 + lla a0,.LC0 addi s0,s0,4 call printf@plt - bne s0,s2,.L33 + bne s0,s1,.L35 ld ra,24(sp) ld s0,16(sp) ld s1,8(sp) - ld s2,0(sp) li a0,0 addi sp,sp,32 jr ra +.LFE12: .size main, .-main + .globl arr .data .align 3 @@ -155,5 +162,5 @@ arr: .word 5 .word 7 .word 8 - .ident "GCC: (Debian 12.2.0-13) 12.2.0" + .ident "GCC: (GNU) 14.1.0" .section .note.GNU-stack,"",@progbits